Workshops > Workshops

o Workshop on Chip level Advanced Failure Analysis Case Studies

Organizer :
Gold Sponsor advantage
Moderator: Jean-Philippe Roux, Sector Technologies (France)

On rather mature technologies, FA engineers have been able to come with new innovative approach and  applications. This workshop will present a subset of these new advanced and surprising applications.
All presentations will be done on final user real test cases

• Thermal phenomena propagation Elite case studies,
• Lockin thermography Elite case study,
• Picoseconds pulsed laser applied to radiation testing,
• Low noise nanoprobing measurement on 28nm technology,
• Spectroscopy application with InGaAs on Meridian IV.

Tuesday from 11:10 to 16:30
Workshop is free of charge but requires pre-registration by email : ESREF2015_seminar@sector-technologies.com

Final Program:

10:40 – 10:50: Sector Technologies Introduction, latest update (Yvan PFEFER, Sector Technologies)

10:50 – 11:20: Advanced FA @ Infineon – Key Aspects for Efficient Investigations  (Key Notes speaker: Jerome Touzel, Infineon AG)
11:20 – 11:50: Lock In thermography applications in the space domain (Kevin SANCHEZ, CNES)
11:50 – 12:20: Multiple and various case studies using the lock In thermography technique (Gerald GUIBAUD – Thales)

13:20 – 13:50: Introduction of spectral mapping through transmission grating, derivative technique of photon emission (Thierry PARASSIN – ST Microelectronic / Antoine REVERDY – Sector Technologies)
13:50 – 14:20: Pulsed laser application for qualification of space component against Single Events (Kevin SANCHEZ – CNES)
14:20 – 14:50: Advancements in Nanoprobing for Electrical Failure Analysis (DCG Systems)
14:50 – 15:10: Nanoprobing EBIRCh, new high resolution technique to localize low to high ohmic shorts on advanced ICs (DCG Systems)
15:10 – 15:30: Scanning Acoustic Microscopy, a new use model (Insight KK, Predictive Image)
15:30 – 16:00: Applications of 3D X-Ray Microscopy for Advanced 2.5D and 3D IC packaging (Zeiss Xradia)

o Workshop on Modeling the reliability at system level : tools and methodology

Moderators: Nicolas Nolhier, LAAS-CNRS (France) and Gilles Peres, Airbus Group Innovations (France)

• Methodology to characterize and model ageing effect on components’ EMC behavior (Emission and Immunity)
   - André DURIER, IRT Saint Exupéry (France),
• Methodology to model components immunity towards ESD and electrical transients
   - Patrice BESSE, Freescale (France),
• IEC ICEM (Integrated Circuit Emission Model) & ICIM (Integrated Circuit Immunity Model) or Evolution of EMC requirements in avionics
   - Christian Marot, Airbus Group Innovations (France),
• Methodology to predict reliability at system level
   - Franck Bayle, THALES Avionics (France).

Tuesday afternoon, 14:10 to 16:30
In conjunction with "Aeronautic, Space and Embedded Systems" session and with Event Committee.
Contacts: André Durier / Alain Bensoussan

o Workshop on DSM Technology impact on safety assessment

Moderator: Didier Régis, Thales Group (France)

For more than 40 years, Gordon Moore’s experimental law has been predicting the evolution of the number of transistors in integrated circuits, thereby guiding electronics developments. Until now, this evolution did not have any measurable impact on components’ quality; but the trend is beginning to reverse. In this session, we are going to address the impact of scaling on the reliability of integrated circuits with a focusing on three basics of safety analyses for aeronautical systems: failure rates, lifetimes and atmospheric radiations’ susceptibility.

Wednesday Morning, 11:00 to 12:20
In conjunction with "Quality and Reliability Assessment - Techniques and Methods for Devices and Systems" session and with Event Committee.
Contact Didier Regis

o Workshop on Failure Analysis  of Critical Systems

Organizer: EUFANET
Moderators: Jerome Touzel, Infineon (Germany) and Olivier Crepel, AIRBUS Group (France).

Systems failure occurs when a system does not meet its requirements.  A laser failing to designate its target, an aerial refueling system failing to transfer fuel at the proper flow rate, a blood chemistry analyzer failing to provide accurate test results, a munition that detonates prematurely, and other similar conditions are all systems failures. Systems failure analysis is an investigation to determine the underlying reasons for the nonconformance to system requirements. Critical systems are systems which reliability is mandatory : Transmission control unit or brakes electronics in a car, computers in a satellite, Engine controls in a plane, etc.. System level FA is quite complex as it has to apprehend system environment to understand the root cause of the failure, and usually harsh environment for plane, car, train, rockets, etc..

We are soliciting you to submit short presentations (5 to 10 slides max) related to System level analysis, either challenges and/or solutions. In addition, because of the very specific character of some of the applications, we would be very pleased to welcome some volunteers who would like to moderate one of the identified topic (please precise)

Please submit your contributions at workshop.esref@eufanet.org no later than September 11, 2015.

On site, moderators will introduce the presentations cases and give the floor to attendees to increase fruitful interactions.
At the end of the workshop, we will let enough time for open questions and general feedbacks.

Wednesday afternoon from 16:40 to 18:20
In conjunction with "Failure Analysis" session

o Workshop European FIB Users Group

Moderator: Hugo Bender, IMEC (Belgium)

In addition to the conference FIB session on Thursday morning a more practically oriented workshop is organized on Thursday as well.  Contributions for the FIB workshop are welcome that relate to practical topics, new developments and application examples of semiconductor applications of FIB, including New instruments :

• HIM, Plasma-FIB, Laser preparation tools,
• Efficient preparation workflows : automated TEM preparation, Plasma-FIB, Laser, atom probe sample preparation,
• Circuit edit : application procedures, new gas chemistries,
• Process monitoring for wafer manufacturing, in-line FIB and wafer return,
• Failure analysis case studies : Si devices, wide bandgap, solar cells.

Thursday from 11:00 to 17:40 split in two by the buffet.
In conjunction with "EFUG" conference session (8:00 - 10.30 – see conference program).

The workshop can be attended by all registered ESREF participants as well as by Thursday-only registration.

The EFUG workshop sponsoring allows (limited) free registration for the FIB conference session and workshop on Thursday.  Contact Hugo Bender for Thursday only registration.

Submit title and 5 lines abstract for oral or poster presentations at the workshop before September 15^th by email to Hugo Bender

The workshop program will be available on the EFUG website in September : www.imec.be/efug/

o Workshop on Power Devices: Reliability of avionics power electronics

Organizer: ECPE
Moderator: Eckhard Wolfgang, ECPE (Germany)

There is quite a lot of progress in automotive and industrial applications regarding qualification of power modules based on the Robustness Validation Process which includes Mission Profiles, End-of Life Testing and Physics of Failure.

• Introduction, Eckhard Wolfgang,ECPE
• Robustness Validation Process, Eckhard Wolfgang,ECPE
• Mission Profile for Solar and Wind, Huai Wang, Univ Aalborg , CORPE
• Translation from system to PE mission profile, Jochen Koszescha, ECPE
• How different skills interact ensuring reliability, Peter de Place Rimmen Danfoss
• Discussion Part 1
• Coffee Break
• Partial discharge in aeronautic environment, Thibaut Billard, More Electrical Aircraft- IRT Saint Exupery
• Heavy ion impact on GaN transistors, Moustafa Zourarka, More Electrical Aircraft- IRT Saint Exupery
• Multistress reliability model for GaN, Alain Bensoussan, More Electrical Aircraft- IRT Saint Exupery
• Fault tolerant power modules, Kai Kriegel, Siemens
• Power Cycling of SiC-MOSFET power modules, Zoubir Khatir, IFSTTIR
• Thermal Management of Satellite Elctr. William Serrano, Airbus Defense&Space
• Discussion Part 2
• Conclusions

Friday morning from 8:30 to 12:30, workshop open to no ESREF attendees . In conjunction with "Power" session.
Contact Eckhart Wolfgang

o Workshop on Design and test for robustness and reliability

Friday October 9 – 8:30 to 12:30, Argos room

Organized by Philippe Perdu, CNES (France)

This workshop aims to cover these wide topics from a component user point of view and should address all the related topics (Safety, Security, Environment: EOS, ESD, EMI, radiation, temperature …). It concerns design and test for reliability and robustness purposes on high reliability / critical embedded systems (automotive, aerospace, transportation, energy, health …).

This workshop will be devided in 3 Parts. Each part will start with a specific lecture one one topic followed by open discussion / Round table

Just enough technology consolidated by the Design IPC standards                                                                                                    

Sylvain Leroux, Jetware

Designing For Reliability in design-chain means considering all the factors necessary to establish the probability that a board will function properly for a defined period of time under the influence of operational condition. Heat and thermal cycling are the enemies of Board performance and long term reliability … for an IPC Certified Interconnect Designers (CID/CID+), managing the heat from the PCB and the assembly is the first line of defense in assuring the reliability of the end product, in order to eliminate a risk of failure introduced by design.  

Sylvain Leroux manages Jetware through “Just Enough technology” combined with IPC CID+ expertise, supported by 30 years of PCB/FPC Designer for manufacturing experience as a NPI architect for, human life support embedded devices, many commercial and military aeronautic embedded systems, drill hole applications, HD video broadcast or radar calculators including the latest FPGA devices …

He uses to work closely with the base material manufacturers, many CAD departments, a dozen of PCB shops (EU & offshore) and some well-known EMS in order to master the entire process.

He is promoting the “Design-chain Enhancement” through industry workshops and trainings about DFM (reliability), HSD (high speed design), HDI (micro via) and FPC (Flex). He has built his expertise, first as a technical sales engineer during 10 years in CAD companies and PCB shops, and then as Technical Account Manager at Atlantec, ACB and Exception PCB.

Today, Sylvain is an IPC instructor for the degree CID (Certified Interconnect Designer) and in 2015 Jetware will become an approved IPC Design training center for all the hardware engineers and senior CAD & CAM operators.

Round table open discussion 1 (design for reliability at PCB / subsystem level)

Statistical Analysis of Big Test Data Helps Reliability

F. Bergeret, Ippon and N. Leblond, Galaxy

        For high reliability devices (Automotive, Aeronautics, Space components...) hundreds of electrical tests are performed on each electronic component (chip). The good chips are shipped to the customer but sometimes there is a latent defect in the product that will fail later in the system. Statistical screening methods are now used routinely for automotive components and are extending to other industries, but the quest for zero defects is never ending. We present in this paper an improvement of existing screening methods, like PAT, and also a new statistical method called TAG, using the multivariate information contained in all the electrical tests. This method is able to detect subtle outliers that are not detected by standard methods. We will also present an adaptation of these methods called the GAT algorithm, which is optimized for the low-volume/high quantity of tests common to the aeronautics and space industries.   Perspective with the comparison to a reference from the design or the test will eventually be presented.

François Bergeret is the founder and CEO of Ippon Innovation. He has worked in R&D, production and quality for 15 years at Motorola and Freescale. He is the designer of the TAG algorithm used for zero defects. He also teaches statistics in a number of companies and universities, and has published 20 technical papers and one book on industrial statistics. He received a PhD in applied mathematics from Toulouse University.

Nicolas Leblond is an applications engineer at Galaxy Semiconductor Solutions. He has worked for more than 10 years in the software and semiconductor industries, both in startups as well as in larger companies like Xilinx, where he played various roles from design, quality and test to applications. He graduated from INP Grenoble with an Engineering degree, specializing in Microelectronics.

Coffee break

Round table open discussion 2 (Statistical Analysis of Big Test Data)

Radiation testing on electronic devices 

Radiation testing on electronic devices

Dr. Pierre GARCIA, TRAD Test team manager

The effects of the space radiation environment on spacecraft systems and instruments are significant design considerations for space missions.

The radiation space environment is mainly constituted by electron, protons and heavy ions. This problematic can also be exported in other environment such as, aeronautic, medical and of course radioprotection.

In this workshop we will focus on radiation effects on electronic devices. This effect can lead to a degradation of the electrical performance: Total Ionizing Dose effect (TID), Total Non Ionizing Dose effect (TNID), functional perturbation or can damage definitively the part : Single Event Effect (SEE). Prior to use an electronic device in a space application, it is mandatory to predict its behavior when exposed to space radiation. Even if modeling techniques are continuously improving, all the tools are not easily accessible. That is the reason why it is generally still necessary to perform radiation testing on electronic devices.

Because the way to perform these tests may affect their results, standards have been written that describe the test method to apply and also the characteristics of the radiation facilities to use.

This workshop has the objective to give an idea of the main rules to follow when preparing and performing a radiation test on electronic devices in a view to predict its behavior when submitted to the natural radiation constraints of space or avionic domains. They can be extended to harsh environments such as nuclear one.

Round table open discussion 3 (Radiation testing)

Workshop conclusions