Workshops > Mini-Workshops on advanced tools and techniques

Mini-Workshops on Advanced tools and techniques (flash presentation)

Moderator: Fulvio Infante, Intraspec Technologies (France)

Tuesday October 6, 9:40 – 10:20, Spot room

 “Extended Sensitivity NIR Camera for Photon Emission Microscopy of ICs”, Andrea Bahgat-Shehata, Franco Stellari, Alan Weger, Peilin Song, IBM (USA), Herve Deslandes, Ted Lundquist DCG Systems (USA) and Antoine Reverdy, Sector Technologies (France).

A photon emission microscopy (PEM) camera has been characterized for acquiring photons emitted from ICs during normal switching events. This camera was designed for sensitivity at longer wavelengths so as to maximize signal intensities from low voltage ICs [1-3]. In this paper, we characterize the performance of the camera using 32 nm and 22 nm SOI chips. This camera can collect emission images from ICs operating at voltages down to 0.5 V, far exceeding the performance of state-of-the-art InGaAs cameras.

 “New Tools for Defect Analysis : Lock In IR Tomography and Cost effective test solutions for digital products”, Fabien Battistella, Thales (France)

Defect analysis techniques evolves following users’ needs towards cost and time to market solutions. Thales Communications & Security has now the capability to propose upstream solutions like Lock In IR tomography to investigate quicker on ( PCB’s, chips, power components, solar cells, …) defects and  also more cost effective and portable test solutions to reveal electrical defect and/or characterize complex digital products as Memories, Image sensors, System on chips(SoC), Digital ICs (FPGAs, audio & video processors…)

“Case Studies of EOP/EOFM (Electro Optical Probing and Frequency Mapping)”, Yoshitaka Iwaki, Hamamatsu (Japan)

We have developed EOFM (Electro Optical Frequency Mapping) and EOP (Electro Optical Probing) for failure analysis. The EOFM enables you to visualize transistor operation as 2D image. And the EOP enables you to probe wave form at transistors. At the presentation, I will introduce the basis & features of the techniques and some case studies from customers.

“Use of advanced localization techniques for fault isolation on packages and dies: Magnetic Current Imaging, Lock-in Thermography, Time Domain Reflectometry and X-Ray Computed Tomography”, Fulvio Infante and Nicolas Courjault, Intraspec Technologies (France)

Very often, the use of one single technique for defect localization is not enough. More and more often, we need to couple the use of several techniques in order to precisely localize defects in advanced technologies. We dispose in our lab of a wide set of those: we will show how a set of them can be used to solve complicated localization problems.

Tuesday October 6, 16:40 – 17:10, Spot room

"Comparison of decapsulation techniques for Copper and Silver wires’’, Patrick Poirier and Michael Obein, Digit-Concept (France)

The ICs have known lot of evolution in the past years due to the introduction of new materials like Cu or Ag wires and the emergence of complex modules and Systems in Package. To meet the decapsulation challenges of these ICs, many studies and many improvements have been done recently. We will give an overview of techniques available and the solutions we propose to solve the issues that are facing the Failure Analysis Laboratories.

“Repeatable method for automated decapsulation of silver alloy wire packages”, Matthew Lefevre, JP Kummer (France), Emmanuel Noraz and Damien Veychard, STMicroelectronics (France)

Over the past several years there has been a large industry wide effort to change over from gold bonding wires to copper in order to minimize production costs. In certain cases this is not possible due to the relatively high hardness values of Cu, which leads to reliability issues in the manufacturing process. Silver (Ag) wire has been proposed and successfully implemented in many instances where Cu wire was not practicable. Unfortunately, currently integrated decapsulation methods severely damaged or destroyed the silver wires and bonds, making it impossible to perform production controls and failure analysis. Here we present a reliable and repeatable automated method to expose these die and wire bonds by adding a dilute iodine solution to the nitric acid in an acid decapsulator.

“New Methodologies for High Accuracy Cleaving (HAC) and Scribing to Speed Time to Analysis Ready Samples”, Efrat Moyal, LatticeGear (USA)

 Increasing complexity combined with shrinking geometries in electronic devices have placed new demands on the sample preparation process. Much effort must be made to assure that the sample preparation process delivers data and does not alter the sample structure or material properties. This presentation will introduce a new method for high accuracy cleaving and scribing methods for cross sectioning targets to 10 µm accuracy without altering the properties of the sample. Unique micro line indentation method will be demonstrated for cleaving semiconductor wafer and wafer pieces, and scribing/cleaving for FlipChip or backside devices.

“Versatile Sample Preparation Tool That Enables Access to Devices for Complex Device Electrical Failure Analysis”, Chris Richardson, Allied High Tech Products (USA)

Ceramics to plastic encapsulated devices, multi-chip modules to 32 layer stacked die, from 0.5 mm x 0.5 mm area devices to 40 mm x 40 mm devices, having a versatile sample preparation tools is critical to enabling electrical failure analysis. Discover through a series of case studies how one tool can provide the right chip access solution for most any sample type.

Tuesday October 6, 17:10 – 17:25, Spot room

 “Tools for Multichannel, phase sensitives Failure Analysis modes”, Romain Stomp, Zurich Instruments (Switzerland)

 “Failure Analysis Going Towards Anamnesis - a Holistic Approach for Successful Root Cause Detection”, Jürgen Gruber, RoodMicrotec (Germany)

Today’s failure analysis show, that only approx. 10% of the root causes are related directly to the failed component. In most cases the failing of the component is only a consequence of a production, assembly or application related problem.

Knowing about this background, the way of failure analysis must be changed to anamnesis, which has to cover all relevant issues like failure history, application conditions, packaging, board assembly, subsystem and system information.

The presentation will give an overview about the distribution of the significant failure causes, an overview about fields which have to be included for the anamnesis and will show some examples of successful anamneses.

Tuesday October 6, 17:25 – 17:55, Spot room

 “When warpage measurements help FA and FEM at the same time!“, Diane Ecoiffier, Insidix (France)

Presentation of case studies regarding warpage and thermal expansion measurements. Discover how they are used to implement models for lifetime simulation and reliability work. With a briefly introduction to TDM technology, we will show two examples of work with measurements and simulation – exchanges between both to improve model, to choose a supplier or a base material (eg. glue or mold).

“Reliability evaluation of electronic solder joints (lead-free), thanks to microstructural analyses (SEM-EBSD) on new vs aged BGAs”, Clovis Lataste and Romain Petre-Bordenave, Elemca (France)

Lead-free solder joints are widely used in automotive or consumer applications, and it will be probably the case also in the aerospace industry in the next years. Yet specific failure mechanism occurs, driven by the metallurgy of the alloy. If accelerated aging through thermal cycling is generally used to monitor the ageing of the soldering, other investigation techniques like EBSD imaging provide interesting inputs to evaluate their reliability. A case study will be proposed to present the results of EBSD investigation on lead-free solder joints.

“Laminography, a high resolution technique for imaging object slice”, P. Serre and N. Paillet, Predictive Image (France)

X-ray tomography is well known as a non-destructive method for technical components analysis. However, this technique has its own limitations when large objects have to be analyzed with high resolution. Here, we present an alternative to tomography: a system of translatoric or rotational laminography, which allows imaging 2D object slices. By using these systems of laminography, it is possible to inspect at large 2D multi layer or to dissociate two components face to face on a printed circuit for example. Thus, this technique expands the capacity of 3D reconstruction with X-Ray methods.

“Scanning acoustic microscope: new technologies in failure analysis”, Kasim Altin, PVA TePla Analytical Systems GmbH (Germany)

For reliability determination a nondestructive method such as scanning acoustic microscopy is technology of choice. However, this method has its own limitations, e.g. when depth and resolution have to be combined to cover the target. This presentation will show how to overcome these challenges and limitations using new methods (e.g. intelligent auto focus axis, advanced signal processing and higher sampling rate….).

Tuesday October 6, 17:55 – 18:20, Spot room

 “Constant Voltage Electromigration (CVEM)”, Eric Wilcox, Cascade Microtech (USA)

CVEM as an alternative method to constant current EM for BEOL reliability test, especially for advanced interconnects with extremely-scaled, non-conductive barriers found in CMOS technologies below the N-10 node.  CVEM advantages include truer lifetime prediction, by preventing unrealistically high voltages over voids when current shunting through the barrier is not available, and reduced distributional shape for higher statistical certainty. The CVEM testing was performed in cooperation between IMEC and Cascade Microtech.

“Effortless nanoprobing by correlative microscopy using the combination of SEM and SPM”, Andrew Jonathan Smith, Kleindiek Nanotechnik (Germany)

“Oxide breakdown and dielectric weak point localization using robotic nanoprobers coupled with EBAC”, Vincent Faivre, Imina Technologies (Switzerland)